1. Field of the Invention
The present invention relates to a semiconductor package and, more particularly, to a semiconductor package having a sealant or molding compound including conductive material, and a manufacturing method thereof.
2. Description of the Related Art
A recent trend in the electronic industry is to manufacture reliable, light, compact, high-speed, multifunctional, and high-performance electronic products at low costs. The package assembly technology enables manufacture of such electronic products. One of the typical packages developed recently is a ball grid array (BGA) package.
Compared to a conventional plastic package, the BGA package requires a minimum mounting area of a motherboard and has improved electrical characteristics. Unlike the conventional plastic package, the BGA package uses a printed circuit board instead of a lead frame. The printed circuit board has an advantage of higher mounting density on, for example, a mother board because contact points, e.g., solder balls, can be formed on an entire undersurface of the printed circuit board, e.g., on the surface of the printed circuit board opposite that surface mounting the semiconductor chip.
FIG. 1 is a cross-sectional view of a conventional BGA package 100. The semiconductor package 100 includes a semiconductor chip 110, a substrate 120, bonding wires 140, a sealant 160, and solder balls 150.
The substrate 120 includes an insulating substrate 121, substrate pads 122 formed on the insulating substrate 121 and electrically connecting the substrate 120 to the semiconductor chip 110, ball pads 123 formed at the bottom of the insulating substrate 121 for electrical connection to an external device (not shown), a substrate-insulating layer 124 formed at the bottom of the insulating substrate 121 and exposing the ball pads 123, and an under bump metallization (UBM) layer 125 formed on the ball pad 123 to improve the adhesive strength between the solder balls 150 and the ball pads 123. The semiconductor chip 110 is bonded with an upper surface of the substrate 120 via a chip-adhesion layer 130.
The semiconductor chip 110 includes chip pads 112 on a chip substrate 111, and a passivation layer 113 formed on the chip substrate 111 and exposing the chip pads 112.
Each of the bonding wires 140 electrically connects one of the substrate pads 122 of the substrate 120 to one of the chip pads 112 of the semiconductor chip 110. In general, the bonding wires 140 are formed of gold (Au).
The sealant 160 is formed of epoxy resin, and seals a part of the upper surface of the substrate 120, the semiconductor chip 110, and the bonding wires 140. The sealant 160 protects the semiconductor chip 110 and the bonding wires 140 from a mechanical or electrical shock.
The solder balls 150 are formed on the UBM layer 125 at the bottom of the substrate 120, and act as external terminals of the semiconductor package 100.
Such a conventional semiconductor package has the certain disadvantages, including the following. First, the conventional semiconductor package may be damaged by an electrical shock caused by polarization. FIG. 2 is a conceptual diagram illustrating the polarization that occurs in the sealant 160 of the conventional semiconductor package 100 of FIG. 1. Since the sealant 160 is formed of epoxy, an insulating material, electric current is not discharged to the outside. Thus, negative charges E2 are concentrated in one side as shown in FIG. 2, thereby causing an uneven distribution of charges in the sealant 160. In FIG. 2, E1 denotes positive charges. The polarization causes static electricity to occur. An integrated circuit of the semiconductor chip 110 may be damaged by an electrical shock caused by such static electricity.
Second, the sealant 160, typically epoxy, has poor heat conductivity. Heat generated from the semiconductor chip 110, as sealed within sealant 160, is not completely dissipated to the outside. When the semiconductor chip 110 operates at a high temperature for a given time, the integrated circuit of the semiconductor chip 110 may malfunction.
Third, as the semiconductor chip 110 operating speed increases, electromagnetic interference (EMI) in the semiconductor chip 110, or from the outside of the semiconductor chip 110, may cause a critical problem. However, it is difficult to effectively block an electromagnetic wave causing the EMI because the sealant 160 of the conventional semiconductor package 100 is formed of insulating resin, e.g., epoxy. Accordingly, optimum design of a semiconductor package, e.g., able to satisfy the electromagnetic compatibility (EMC) on a system level, may not be achievable.